Power Efficient Floating-point processors
At imec, Ultra low power DSP
While converting the high level applications written in e.g. Matlab to Embedded C, converting floating-point Matlab code to fixed-point C code is typically one of the most difficult tasks. This is an error-prone and difficult task, which significantly increases the time to market of new applications. Floating point is typically considered power inefficient, which might be valid for the actual calculations alone, but on system level many other factors have to be considered: Fixed point requires scaling (extra cycles) and wide data types and registers (accumulators) to avoid overflows. Also existing floating point standards like IEEE 754 are complex due to corner cases (NaN, Subnormal numbers, etc.), which can possibly be ignored.
In this thesis, power efficient implementations of floating point arithmetic on a processor will be studied and compared with an identical algorithm implemented in fixed point.
Tasks
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Literature research, analysis of different floating point implementations and their strong and weak points.
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Work out a proposal for a floating point implementation, focused on power efficiency.
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Implement the proposal in a processor, and run power simulations to compare results with an existing fixed-point implementation.
Requirements
We are looking for a motivated MSc-student with the following background:
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in Electrical Engineering or Computer Sciences;
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experience in Embedded C, Processor design and VHDL/Verilog considered a plus;
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capable of successfully finishing a project autonomously;
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good verbal and written communication skills in English.
For all inquiries, please contact:
Ms Sandra Maas, Management Assistant Human Resources.
Telephone number: +31 (0)40 40 20 500.
Application form