Adding ultra-low power digital signal processing to a sensor node means the node can do more advanced and more energy-efficient data processing. So it can independently react to input changes without needing to contact the basestation. This speeds up response times and reduces the power used for wireless transmission – and hence the node as a whole.

The program targets processing architectures that reduce power consumption to below 20 µW for biomedical and wireless radio applications. At these power levels, energy scavenging becomes feasible.

To reach these levels, architectures are typically optimized for specific application domains. Yet they must also be flexible enough to support different operating modes depending on factors including the type and quality of the sensor output and the communication protocol used in the application. Each mode will have different processing and performance needs, and the system must deliver high energy efficiency in each case. 

 

There is a strong emphasis on reducing the overall energy consumption of the complete application. Designing the analog sensor readout and radio together with the digital signal processing architecture allows the entire system to be optimized for low power.

  

The program looks at all aspects of digital signal processing solutions – from algorithm design to low-power circuit implementation. The focus is on reliable ultra-low voltage operation. Reducing the operating voltage hugely reduces the circuit's energy consumption. But it also reduces performance and increases the impact process and environment variations have on circuit operation. To enable near-threshold operating voltages, this program develops solutions to monitor circuit sections and ensure they operate correctly in all conditions. It also creates solutions for adapting the system supply voltage to suit the current processing needs, delivering high energy efficiency and processing capacity.